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Marvell Launches New Prestera DX Products for Service Delivery Applications


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August 28, 2013

Marvell Launches New Prestera DX Products for Service Delivery Applications

By Mandira Srivastava, TMCnet Contributor

To provide faster service provisioning and improved deployment and management of converged solutions in the educational and enterprise networks, Marvell (News - Alert) has released the Marvell Prestera DX4200 series of packet processors designed to enable unique service-delivery solutions in the access and aggregation layers for a new generation of converged fixed and mobile networks.

The eighth generation Prestera DX family is offered in a 28nm process. With advanced System-on-Chip (SoC) for converged wireless and wireline networking, DX4200-based systems are intended to enable the integration of multiple network elements into a single entity, thereby reducing infrastructure complexity and enabling better TCO, with more active services enablement per watt. Integration of multi-core ARM (News - Alert) CPUs, a carrier grade traffic manager and a flexible IPv6 packet processing pipeline in the DX4200 offers dynamic software defined networking and advanced service virtualization.

Ramesh Sivakolundu, vice president for the Connectivity, Services and Infrastructure Business Unit (CSIBU) at Marvell Semiconductor, said in a statement, "As demand for higher service density per watt increases, Marvell is uniquely positioned to offer platforms for the software defined storage, networking, mobile and compute clouds being designed today. We believe the Prestera DX provides the best platform for services-driven mobile backhaul and carrier Ethernet infrastructures along with application-driven secure access and aggregation layers in datacenter and campus networks."

Besides providing timing and synchronization support, the DX4200 also supports a range of converged service enablers like CAPWAP, MPLS, VPLS, OAM, SPB and Bridge Port Extension. Its integrated InterLaken interface is designed to enable the development of transport and circuit switched solutions while leveraging the service enabling paradigms of the DX4200. The integrated traffic manager offers hierarchical flow based quality of service and massive external buffering enabling tens of thousands of applications and users through unique queuing schemes that insure no variance in user experience across different access models.

The multi-core ARM v7 processors installed in the DX4200 enables a variety of offload capabilities that can be used for real-time analytics, system or module topology management and other software defined networking solutions. The enhanced features are coupled with line rate performance, highly flexible physical interfaces and a large set of standards-based networking capabilities.

Edited by Blaise McNamee

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