Arteris, Inc. has announced Arteris' Network-on-Chip (NoC) technology support for Tensilica's Xtensa Processor (News - Alert) Interface (PIF).

Arteris' Network-on-Chip (NoC) technology can provide complete support for Tensilica's Xtensa Processor Interface (PIF) while making it easier for designers to get maximum efficiency when integrating Tensilica's (News - Alert) dataplane processing units (DPUs) into their system-on-chip (SOC) designs.

Tensilica's DPUs can now be integrated with other processor cores or RTL blocks in complex, high-throughput designs using Arteris' NoC technology. Used in multi-core chip designs, Tensilica's DPUs perform valuable data processing functions such as audio, video and baseband communications.

Chris Jones, Tensilica's director of product marketing noted that its Network-on-Chip technology is valuable as designers can integrate different functions on various resources that can effectively share a bus. He added that with Arteris' out-of-the-box support for the Xtensa PIF, Arteris' customers can quickly define a high-performance interconnect of multiple Xtensa processors.

Adding native Tensilica support has broadened the number of processor cores that can effectively support its NoC technology, according to Charlie Janac, president and CEO of Arteris. He added that the interconnect design is the key component of the SOC integration, and that with more flexible options available to the designer the result has been a better SOC design.

Support for the Arteris NoC is an addition to the number of interconnect options for Xtensa processors. 

In related news, Arteris announced the availability of NoC Interconnect IP and Tools to TSMC customers.