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Broadcom Launches New Networking Chip

Network Management

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October 09, 2012

Broadcom Launches New Networking Chip

Broadcom officials recently revealed that the company has leapt ahead of competitors like Freescale, Marvell (News - Alert) and LSI with the debut of the 28-nanometer, low-power networking chip.


In addition to cloud computing, the new offering is aimed at environments such as software-defined networks as well as for 4G Long Term Evolution (LTE (News - Alert)) service provider deployments and enterprise data centers that increasingly are demanding greater scalability, performance and energy efficiency.

Kelvin Khoo, senior director of Business Development at Broadcom (News - Alert), said that the new 28nm chips which are sampling now and will be in volume production in the second half of 2013, come at a time when other vendors are still churning out 40nm products.

The XLP 200-Series chips, unveiled earlier in October, are expected to meet the growing industry demand for more performance and better energy efficiency. Khoo said that the new chips offer 400 percent faster performance than competing products as well as drives down power consumption by up to 60 percent.

Earlier this year, Broadcom acquired NetLogic (News - Alert) Microsystems for $3.7 billion. The XLP 200-Series is the first offering post-acquisition. The company believes that the acquisition has helped it to expand its business in the $3 billion multi-core communications chip market, which includes products for everything from wireless and networking offerings to storage and security.

Broadcom has a full range of 40nm chips and the NetLogic deal has enabled the company to accelerate its 28nm ambitions. The XLP 200-Series is “just the first step in the 28nm process mode of which there will be many more products to come.”

The new chips offer one or two MIPS cores that support quad-threading for each, in addition to out-of-order execution capabilities. Moreover, the chip’s Autonomous Acceleration Engine enables the offloading of processing tasks, freeing up the core to perform other compute-intensive tasks.




Edited by Jamie Epstein




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