The tremendous growth in telecommunication technologies has originated from new demand for bandwidth, whose usage durations apparently don’t suffice for the intensity of telecom operations today.

A rapid reduction in bandwidth prices is also prominent reason for the growth in communications bandwidth.

A new Serial RapidIO Gen2 MegaCore function of intellectual property (IP) is the latest product from Altera (News - Alert) Corporation that addresses the growing demand for bandwidth in global communications infrastructure systems.

This system was developed by Altera and IDT to interoperate its Serial RapidIO (News - Alert) Gen2 MegaCore function IP with IDT's 80HCPS1848 switch in x1, x2 and x4 lane configurations, from 6.25G up to 25G of aggregate bandwidth. 

The new IP solution has successfully completed full hardware interoperability with the latest RapidIO switch from Integrated Device Technology (News - Alert) (IDT), operating at 6.25 Gbaud per lane, implemented on a 28-nm Altera Stratix V FPGA.

"Serial RapidIO is the optimal interconnect for clustering networks of peer-to-peer embedded processors, DSPs, FPGAs and ASICs," said Alex Grbic, director of product marketing at Altera. "Communication systems are demanding more capacity for data and voice traffic, and Altera's Serial RapidIO Gen2 IP, interoperating at the fastest rates with IDT switches, eases the implementation of these rapidly evolving applications.”

 Customers are deploying RapidIO to reduce interface debug time and focus on the core functions of system design. It can provide a significant additional impetus to aggregate growth and productivity.

Tom Sparkman, general manager and vice president of the Communications Division at IDT, said in a statement, “As bandwidth requirements increase in communication systems, our customers rely on IDT's proven RapidIO switches along with FPGAs from vendors like Altera. The interoperability of our devices allows our customers to design and develop systems with confidence. ”