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TMCNet:  ARM Assigned Patent for Tile-based Graphics System and Method of Operation of Such a System

[January 01, 2013]

ARM Assigned Patent for Tile-based Graphics System and Method of Operation of Such a System

(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., Jan. 1 -- ARM, Cambridge, United Kingdom, has been assigned a patent (8,339,409) developed by David Robert Shreiner, Mountain View, Calif., for a "tile-based graphics system and method of operation of such a system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A tile-based graphics system, and method of operation of such a system, are provided for generating graphics data for a frame comprising a plurality of tiles. Graphics processing circuitry is provided which is arranged to be switched between a first mode of operation and a second mode of operation. In the first mode of operation, the graphics processing circuitry receives the plurality of graphics primitives for the frame, and performs a binning operation to determine, for each of the plurality of tiles, a tile list identifying the graphics primitives which intersect that tile. In the second mode of operation, the graphics processing circuitry receives the tile list for an allocated tile, and performs a rasterization operation to generate the graphics data for the allocated tile dependent on the tile list. This enables the same graphics processing unit to be used for both binning and rasterization operations, significantly reducing the size of the graphics system, while also allowing improvements in performance and energy consumption." The patent application was filed on Feb. 16, 2011 (12/929,807). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,339,409&OS=8,339,409&RS=8,339,409 Written by Satyaban Rath; edited by Hemanta Panigrahi.


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