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Texas Instruments Assigned Patent for Gate Dielectric First Replacement Gate Processes and Integrated Circuits Therefrom
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Feb. 16 -- Texas Instruments, Dallas, has been assigned a patent (8,372,703) developed by Brian K. Kirkpatrick, Allen, Texas, Freidoon Mehrad, Plano, Texas, and Shaofeng Yu, Plano, Texas, for a "gate dielectric first replacement gate processes and integrated circuits therefrom."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for fabricating a CMOS integrated circuit (IC) and ICs therefrom includes the steps of providing a substrate having a semiconductor surface, wherein the semiconductor surface has PMOS regions for PMOS devices and NMOS regions for NMOS devices. A gate dielectric layer is formed on the PMOS regions and NMOS regions. An original gate electrode layer is formed on the gate dielectric layer. A gate masking layer is applied on the gate electrode layer. Etching is used to pattern the original gate electrode layer to simultaneously form original gate electrodes for the PMOS devices and NMOS devices. Source and drain regions are formed for the PMOS devices and NMOS devices. The original gate electrodes are removed for at least one of the PMOS devices and NMOS devices to form trenches using an etch process, such as a hydroxide-based solution, wherein at least a portion and generally substantially all of the gate dielectric layer is preserved. A metal comprising replacement gates is formed in the trenches, and fabrication of the IC is completed."
The patent application was filed on Oct. 20, 2010 (12/908,140). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,372,703&OS=8,372,703&RS=8,372,703
Written by Satyaban Rath; edited by Hemanta Panigrahi.
SR0216HP0216-842862
(c) 2013 Targeted News Service
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