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Freescale Semiconductor Assigned Patent for Method for Forming a Split-gate Memory Cell
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Feb. 16 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (8,372,699) developed by Sung-Taeg Kang, Austin, Texas, and Jane A. Yater, Austin, Texas, for a "method for forming a split-gate memory cell."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for forming a semiconductor device includes forming a first semiconductor layer over a substrate, forming a first photoresist layer over the first semiconductor layer, and using only a first single mask patterning the first photoresist layer to form a first patterned photoresist layer. The method further includes using the first patterned photoresist layer etching the first semiconductor layer to form a select gate and forming a charge storage layer over the select gate and a portion of the substrate. The method further includes forming a second semiconductor layer over the charge storage layer, forming a second photoresist layer over the second semiconductor layer, and using only a second single mask patterning the second photoresist layer to form a second patterned photoresist layer. The method further includes forming a control gate by anisotropically etching the second semiconductor layer and then subsequently isotropically etching the second semiconductor layer."
The patent application was filed on Feb. 22, 2010 (12/710,111). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,372,699&OS=8,372,699&RS=8,372,699
Written by Satyaban Rath; edited by Hemanta Panigrahi.
SR0216HP0216-842865
(c) 2013 Targeted News Service
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