Intel Assigned Patent for Method to Form Lateral Pad on Edge of Wafer
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., March 1 -- Intel, Santa Clara, Calif., has been assigned a patent (8,383,949) developed by Edris M. Mohammed, Beaverton, Ore., and Hinmeng Au, San Jose, Calif., for a "method to form lateral pad on edge of wafer."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments are directed to an apparatus and fabrication method to form pad arrays on the edge of a substrate wafer substrate. Embodiments of the invention make it possible for surface mount devices to be bonded vertically (i.e. on their side) using standard semiconductor assembly processes."
The patent application was filed on Dec. 29, 2009 (12/649,328). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,83,949.PN.&OS=PN/83,83,949&RS=PN/83,83,949
Written by Amal Ahmed; edited by Jaya Anand.
(c) 2013 Targeted News Service
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