Micron Technology Assigned Patent for Integrated Circuit Fabrication
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Aug. 19 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,507,341) developed by five co-inventors for an integrated circuit fabrication. The co-inventors are Luan C. Tran, Meridian, Idaho, John Lee, Boise, Idaho, Zengtao "Tony" Liu, Boise, Idaho, Eric Freeman, Kuna, Idaho, and Russell Nielsen, Boise, Idaho.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for defining patterns in an integrated circuit comprises defining a plurality of features in a first photoresist layer using photolithography over a first region of a substrate. The method further comprises using pitch multiplication to produce at least two features in a lower masking layer for each feature in the photoresist layer. The features in the lower masking layer include looped ends. The method further comprises covering with a second photoresist layer a second region of the substrate including the looped ends in the lower masking layer. The method further comprises etching a pattern of trenches in the substrate through the features in the lower masking layer without etching in the second region. The trenches have a trench width."
The patent application was filed on April 12, 2012 (13/445,797). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,507,341.PN.&OS=PN/8,507,341&RS=PN/8,507,341
Written by Kusum Sangma; edited by Anand Kumar.
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