Power Integrations Assigned Patent
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Aug. 19 -- Power Integrations, San Jose, Calif., has been assigned a patent (8,507,335) developed by Igor Sankin, Starkville, Miss., David C. Sheridan, Starkville, Miss., and Joseph Neil Merrett, Starkville, Miss., for a "semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Semiconductor devices are described wherein current flow in the device is confined between the rectifying junctions (e.g., p-n junctions or metal-semiconductor junctions). The device provides non-punch-through behavior and enhanced current conduction capability. The devices can be power semiconductor devices as such as Junction Field-Effect Transistors (VJFETs), Static Induction Transistors (SITs), Junction Field Effect Thyristors, or JFET current limiters. The devices can be made in wide bandgap semiconductors such as silicon carbide (SiC). According to some embodiments, the device can be a normally-off SiC vertical junction field effect transistor. Methods of making the devices and circuits comprising the devices are also described."
The patent application was filed on May 16, 2011 (13/108,505). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,507,335.PN.&OS=PN/8,507,335&RS=PN/8,507,335
Written by Kusum Sangma; edited by Anand Kumar.
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