Micron Technology Assigned Patent for Stackable Semiconductor Assemblies and Methods of Manufacturing such Assemblies
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Aug. 30 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,518,747) developed by Swee Kwang Chua, Singapore, for "stackable semiconductor assemblies and methods of manufacturing such assemblies."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Stacked semiconductor devices and assemblies including attached lead frames are disclosed herein. One embodiment of a method of manufacturing a semiconductor assembly includes forming a plurality of first side trenches to a first intermediate depth in a molded portion of a molded wafer having a plurality of dies arranged in rows and columns. The method also includes forming a plurality of lateral contacts at sidewall portions of the trenches and electrically connecting first side bond-sites of the dies with corresponding lateral contacts of the trenches. The method further includes forming a plurality of second side channels to a second intermediate depth in the molded portion such that the channels intersect the trenches. The method also includes singulating and stacking the first and second dies with the channels associated with the first die aligned with channels associated with the second die."
The patent application was filed on Sept. 14, 2012 (13/619,409). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=85,18,747.PN.&OS=PN/85,18,747&RS=PN/85,18,747
Written by Amal Ahmed; edited by Jaya Anand.
(c) 2013 Targeted News Service
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