General Electric Assigned Patent for Integrated Circuit and Method of Fabricating same
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Sept. 21 -- General Electric, Niskayuna, N.Y., has been assigned a patent (8,536,674) developed by four co-inventors for an "integrated circuit and method of fabricating same." The co-inventors are Cheng-Po Chen, Niskayuna, N.Y., Emad Andarawis Andarawis, Ballston Lake, N.Y., Vinayak Tilak, Niskayuna, N.Y., and Zachary Stum, Niskayuna, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method includes providing a substrate with at least one semiconducting layer. The method also includes forming a plurality of isolation barriers within the at least one semiconducting layer, thereby forming a plurality of device islands. The method further includes inserting a plurality of electronic devices into a portion of the at least one semiconducting layer such that each electronic device is substantially isolated from each other electronic device by the device islands."
The patent application was filed on Dec. 20, 2010 (12/973,097). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8536674.PN.&OS=PN/8536674&RS=PN/8536674
Written by Deviprasad Jena; edited by Jaya Anand.
(c) 2013 Targeted News Service
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