NetLogic Microsystems Assigned Patent
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Sept. 26 -- NetLogic Microsystems, Irvine, Calif., has been assigned a patent (8,543,747) developed by Julianne Jiang Zhu, Los Gatos, Calif., and David T. Hass, Santa Clara, Calif., "delegating network processor operations to star topology serial bus interfaces."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. The data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. In one aspect of an embodiment of the invention, the messaging network connects to a high-bandwidth star-topology serial bus such as a PCI express (PCIe) interface capable of supporting multiple high-bandwidth PCIe lanes. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner."
The patent application was filed on Oct. 4, 2011 (13/253,044). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8543747.PN.&OS=PN/8543747&RS=PN/8543747
Written by Sudarshan Harpal; edited by Jaya Anand.
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