Texas Instruments Assigned Patent for Integration of MOSFETs in a Source-down Configuration
(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service
ALEXANDRIA, Va., Oct. 5 -- Texas Instruments, Dallas, has been assigned a patent (8,547,162) developed by Jacek Korec, Sunrise, Fla., Christopher B. Kocon, Mountain Top, Pa., and Shuming Xu, Schnecksville, Pa., for an "integration of MOSFETs in a source-down configuration."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "An output stage for a switched mode power supply has a high-side switch having a first power FET and a first speed-up FET monolithically integrated onto a first die. A low-side switch has a second power FET and a second speed-up FET monolithically integrated onto a second die. A semiconductor device has the power FET and the speed-up FET monolithically integrated in a "source-down" configuration. A method of operating an output stage of a switched mode power supply alternately turns on and off a high-side and a low-side switch and drives at least one of the switches with a speed-up FET monolithically integrated with the switch."
The patent application was filed on Dec. 9, 2010 (12/964,527). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8547162.PN.&OS=PN/8547162&RS=PN/8547162
Written by Sudarshan Harpal; edited by Jaya Anand.
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