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TMCNet:  LSI Assigned Patent for Scan Test Integrated Circuit

[March 13, 2014]

LSI Assigned Patent for Scan Test Integrated Circuit

(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., March 12 -- LSI, San Jose, Calif., has been assigned a patent (8,671,320) developed by Ramesh C. Tekumalla, Breinigsville, Pa., for an "integrated circuit comprising scan test circuitry with controllable number of capture pulses." The patent application was filed on June 21, 2011 (13/165,284). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8671320.PN.&OS=PN/8671320&RS=PN/8671320 Written by Vessie Ann Abalos.


22AbalosV03122014-988446 (c) 2014 Targeted News Service

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