Xilinx (News - Alert), Inc. has unveiled its extended Forward Error Correction (FEC) Intellectual Property Core offering, which consists of GFEC, EFEC and high gain FEC or xFEC solutions.
The service was launched by Xilinx at the WDM and Next Generation Optical Networking 2012 Conference, held in the Grimaldi Forum, Monaco.
Xilinx’s systems are helpful in achieving error control in signal transmission and lengthening the distance of a transmission, cutting down the number of regenerators or hops along the route, resulting in decreased OpEx and CapEx expenses for network operators.
A common interface has been used by Xilinx to develop these FEC IP cores, speeding product manufacturing and decreasing system level incorporation time. The interface also augments design reuse and decreases the time-to-market.
GFEC IP cores for 2.5G, 10G, 40G, 100G applications, legacy 10G EFECs and a Xilinx Extended FEC or xFEC Intellectual Property core for 100G applications comprise the ultra compact, high-performance FEC cores.
Relative to non-Xilinx IP cores, Xilinx FPGAs – which use these cores – occupy less silicon real estate, making them the tiniest FEC cores available. Some of the top applications expected to be available in the second quarter of 2013 will include Xilinx’s 400G GFEC.
"As bandwidth demands increase and the tolerance for errors and latency decreases, system designers are looking for new ways to expand available bandwidth and improve the quality of transmission,” said Nick Possley, senior director of Wired Communications at Xilinx. “To solve these challenges, Xilinx has extended our leadership position in the OTN marketplace by delivering this expanded offering of FEC IP cores for 2.5G, 10G, 40G, 100G and 400G applications.”
“The power/performance available in our 7 series FPGA family combined with this FEC portfolio enables our customers to achieve higher data rates, increase bandwidth and reduce system costs within the OTN application space," he added.
Users can also send a signal over a larger distance by correcting errors with the coding gain offered by FEC in all OTN systems.
Edited by Braden Becker